Student (m/f/d): Performance spaces of analog CMOS circuit topologies

Unlike digital CMOS circuits where synthesis and layout are almost completely automated, analog CMOS circuits are still designed predominantly manually. In order to accelerate the design process, we work on automation methods for analog circuit and system design.

At first, one defines the architecture of the analog system (e.g. receiver, frontend) and determines the specification for the circuit blocks. Subsequently, circuit topologies being able to achieve the demanded performances are searched for. To choose a suitable topology from a circuit library, it is necessary to know about the performance spaces of every circuit topology, i.e. which values of certain performance parameters (as amplification, bandwidth, e.g.) can be achieved.

During this work, a concept of practically determining the performance spaces of analog CMOS circuit topologies shall be elaborated. This must be carried out with as low computational effort as possible. The obtained data shall be read out and processed using Python. We recommend using SPICE for the simulations. The Cadence design environment will be available, too. Finally, the performance space of one chosen circuit topology that has already been applied in one of our ASIC projects shall be determined.

• familiarization with the theoretical basics of performance spaces
• setting up the software tools for simulation and evaluation
• working out a concept of determining the performance spaces of analog CMOS circuit topologies in an efficient manner (using Cadence, Python and SPICE)
• choosing one circuit topology to be characterized regarding its performance spaces
• documentation by report or thesis