Student (m/f/d): Generator for Digital Circuit Templates

To introduce new innovations and architectural ideas in microelectronics, parts of the requirements must be implemented in integrated digital circuits. Typically, recurring requirements arise that can be realized repeatedly through specific sub-circuits. To minimize design effort and enable reusability, one goal in designing these circuits is to make them highly configurable. However, to meet the new design, the circuits often need to be manually modified. This particularly prevents a quick time-to-market (TTM) and slows down further development in subsequent projects.

To further automate circuit design and reduce the design effort in modifying existing circuits, a Python-based generator should be developed to modify these circuits according to specified requirements. Additionally, a manufacturable layout and initial simulations of the circuit will be generated. This allows for easy integration of the generated circuit blocks into an existing design environment. A Digital Clock Manager (DCM), which multiplies the input clock and provides it to the system, will serve as an example circuit to test the generator.

• Introduction to digital synthesis and simulation/verification of integrated circuits
• Definition of a repository structure where circuit templates can be stored for use by the generator
• Definition of the necessary inputs for the generator
• Design and implementation of a generator to create circuit variants from circuit templates
• The following functions should be covered by the generator:
  • Creation of a datasheet for the circuit from the provided configurations
  • Generation of Verilog code for the digital circuit
  • Conducting initial simulations for verification/evaluation
  • Adjustment and execution of synthesis scripts and generation of a circuit layout
• Testing the generator using an existing example circuit by generating variations of this circuit in different process technologies and configurations
• Evaluation of the results and assessment
• Documentation