Student (m/f/d): Netlist Carpentry: Automatic SDF annotation for digital circuits

Optimizing digital circuits for area and performance is a central process in hardware development. At IMMS, the open-source Python framework “Netlist Carpentry” was developed for this purpose. It automatically analyzes and modifies circuit netlists, for example, to save area. However, it is necessary to comply with timing constraints whenever transformations are made. The timing information (i.e., the delay values of individual gates) is typically stored in the Standard Delay Format (SDF). To enable Netlist Carpentry to check whether given timing constraints are met, the SDF data must be read in and annotated to the corresponding gates. This requires an SDF parser. In this thesis, existing SDF parsing libraries must therefore be analyzed, and if necessary, a custom parser must be implemented. The imported delay values must then be annotated to the respective gates so that the total delay can be determined later. The entire process must be both documented and verified through testing.

• Familiarization with the structure of Netlist Carpentry
• Analysis of existing SDF parsing libraries
• Connection of a matching SDF library to Netlist Carpentry or implementation of an SDF parser
• Design und successive implementation of a process that annotates given SDF values onto gates of a circuit
• Documentation, Test and Evaluation of the created and implemented annotation process